US chip startup d-Matrix plans to connect its next-generation Raptor artificial-intelligence processors to Nvidia’s NVLink Fusion ecosystem, placing a specialist inference accelerator inside the industry’s most influential rack-scale architecture. The companies expect integrated systems to become commercially available in the fourth quarter of 2027.
d-Matrix said Raptor is scheduled to tape out before the end of 2026. In semiconductor development, tape-out marks the point at which a completed design is sent for manufacturing, not the arrival of production hardware. The gap between that milestone and planned rack availability leaves time for fabrication, validation, system integration and customer qualification.
The proposed platform will combine d-Matrix XPUs with Nvidia Vera central processors and NVLink Fusion, which allows approved partners to build custom accelerators that communicate across Nvidia’s high-bandwidth interconnect. It will use the MGX modular server specification together with ConnectX-9 networking, BlueField-4 data-processing units and Spectrum-X Ethernet components.
Astera Labs will provide customized connectivity technology for the rack. That detail is important because performance in large AI systems depends on far more than the arithmetic capability of an individual chip. Moving data between processors, memory and network interfaces can determine latency, energy consumption and how effectively expensive hardware is used.
d-Matrix is concentrating on inference—the stage at which trained AI models generate responses or make predictions. Training remains highly compute-intensive, but the rapid adoption of generative AI is making inference a larger and more persistent cost for cloud providers. Systems optimized for that workload seek to deliver more tokens with lower delay and power use.
The startup describes Raptor as a memory-centric design intended to reduce data movement. Its claims will need to be tested on production silicon and real customer workloads. Even so, adopting NVLink Fusion gives d-Matrix a route into server designs that already use Nvidia’s networking, management and software environment.
For Nvidia, the arrangement demonstrates a different kind of platform power. Opening NVLink technology to selected third-party processors can broaden the range of workloads built around Nvidia infrastructure, even when the main accelerator is not an Nvidia GPU. It also makes the interconnect and rack design a strategic layer of the AI supply chain.
d-Matrix has attracted backing from Microsoft and was valued at about $2 billion after raising $450 million in 2025, Reuters reported. Its first commercial chip arrived in November 2024. Raptor therefore represents both a technical upgrade and a test of whether a well-funded challenger can secure meaningful deployment in a market dominated by Nvidia.
The partnership does not remove that competitive tension. d-Matrix still has to demonstrate price, availability and software maturity, while cloud customers will compare the system with GPUs and other custom accelerators. At the same time, its dependence on Nvidia’s interconnect shows why competition is no longer confined to standalone chips.
The strategic contest is increasingly over complete computing systems: processors, memory, networking, software and the supply relationships that bind them together. If Raptor ships on schedule in late 2027, its significance will lie not only in its inference performance but in whether an alternative accelerator can scale inside an ecosystem shaped by the market leader.
